In an electrically erasable programmable read-only memory (EEPROM), an accurate high voltage is required for erase/write cycles. Conventional approaches use a charge pump to raise voltage, which is in combination with a clamping diode. For example, in FIG. 1, a charge pump 10, driven by a clock signal (CLK), may provide a high voltage used to drive a load device 20. In order to ensure that the output voltage of the charge pump 10 is in a safe state, a clamping diode D0 is configured in parallel at the output terminal of the charge pump 10. Due to the reverse breakdown current-voltage characteristics of the clamping diode D0, any excess current can be drained through the clamping diode D0. The high voltage may then be maintained within a certain range.
As shown in FIG. 1, a current flowing through the clamping diode D0 is ID, and a current flowing through the load device 20 is IL. The total output current of the charge pump 10 is Iout=ID+IL. The power consumed by the clamping diode D0 is PD=Vout×ID; and the total output power of the charge pump 10 is Pout=Vout×Iout=Vout×(ID+IL), where Vout denotes output voltage of the charge pump 10.
Further, in practical applications, a total output current Iout of the charge pump 10 is often designed to be ILmax+ID, where ILmax is a maximum load current flowing through the load device 20. The clock signal of the charge pump 10 typically has a relatively high frequency. Since both the power Pout consumed by the charge pump 10 and the power PD consumed by the clamping diode D0 are proportional to the frequency of the clock signal of the charge pump 10, the clamping diode D0 consumes a large amount of power. The circuit in FIG. 1 therefore has undesired high power consumption.
In addition, because the clamping diode D0 is operated under high voltages and high powers, the clamping diode D0 may gradually age over time of usage. Consequently, voltage across the clamping diode D0 may be gradually increased, which eventually leads to increase of the output voltage Vout of the charge pump 10. Reliability of erase/write in EEPROM is reduced.
Thus, there is a need to overcome these and other problems and to provide a voltage regulator circuitry and method to reduce power consumption and to increase reliability of EEPROMs.